91212nkpc 20120822-s00003 no.a2120-1/5 http://onsemi.com semiconductor components industries, llc, 2013 august, 2013 lv58063mc overview lv58063mc is a 1ch step-down switching regulator. 0.13 fet is incorporated on the upper side to achieve high-efficiency operation for large output current. low-heat resistance and compact-pack age sop8l (200mil) employed. current mode control gives superior load current response with easy phase compensation. en pin, allowing the standby mode with the current drain of 70 a. pulse-by-pulse over-current protection and overheat protection available for protection of load devices. externally adjustable soft start time. features ? 3a 1ch step-down switching regulator ? thermal shutdown ? wide input range (8 to 28v) ? reference voltage: 0.8v ? high efficiency (90% i out =1a, v in =12v, v out =5v) ? fixed frequency: 370khz ? standby mode ? soft start ? over-current protection ? compact package: sop8l (200mil) with exposed pad ? overshoot control after over-current protection event application ? lcd/pdp-tv stb white goods office equipment general consumer electronics bi-cmos lsi step-down switching regulator orderin g numbe r : ena2120
lv58063mc no.a2120-2/5 specifications absolute maximum ratings at ta = 25 c parameter conditions conditions ratings unit maximum input v in voltage v in max 32 v boot pin maximum voltage v bt max 37 v sw pin maximum voltage v sw max v in max v boot pin-sw pin maximum voltage v bs-sw max 7v fb, en, comp, ss pin maximum voltage vfs max 7v allowable power dissipation pd max mount on a specified board * 2.05 w junction temperature tj max 150 c operating temperature topr -20 to +80 c storage temperature tstg -40 to +150 c * specified board: 46.4mm 31.8mm ? 1.7mm, glass epoxy. note: plan the maximum voltage while including coil and surge volt ages, so that the maximum voltage is not exceeded even for an instant. recommended operating conditions at ta = 25 c parameter conditions conditions ratings unit v in pin voltage v in 8 to 28 v boot pin voltage v bt -0.3 to 34 v sw pin voltage v sw -0.4 to v in v boot pin-sw pin voltage v bs-sw 6.5 v fb, en, comp, ss pin voltage v fso 6v electrical characteristics at ta = 25c v in = 12v, unless otherwise specified. ratings parameter conditions conditions min typ max unit ic current drain at standby i cc 1 en=0v 70 a ic current drain in operation i cc 2 en=open, fb=1v 5 ma efficiency effcy v in =12v, i out =1a, v o =5v design target: *1 90 % reference voltage vref v in =8v to 28v ( 2%) -2% 0.8 +2% v fb pin bias current iref fb=0.8v application 10 100 na high-side on resistance ronh boot=5v 0.13 low-side on resistance ronl 7 oscillation frequency f osc 296 370 444 khz oscillation frequency during short-circuit protection f oscs 30 38 46 khz en high-threshold voltage venh 1.9 v en low-threshold voltage venl 0.8 v en pull-up corrent ien en=0v 16 a maximum on duty d max 80 % current limit peak value 1 icl1 v in =12v, v out =5v, l=10 h 3.8 a thermal shutdown temperature ttsd *design guarantee *2 160 c thermal shutdown temperature hysteresis dtsd *design guarantee *2 40 c soft start current i ss ss=0v 6 10 14 a *1: reference value (not tested before shipment) *2: design guarantee (value guaranteed by design and not tested before shipment) stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
lv58063mc no.a2120-3/5 package dimensions unit : mm (typ) 3439 pin assignment 1 2 3 4 8 7 6 5 boot v in sw gnd ss en comp fb to p view block diagram and sample application circuit (3.3v output) fb comp osc 370khz error amp. pwm comparator ss en uvlo + current sense amp. pre-drive vref 0.8v tsd internal regulator v in internal regulator (5v) internal stable supply v in =12v 1:n sw gnd boot boot (sw +vreg.) v out =3.3v ++ -- r10=4.3k r1=27k r3=10k r2=2.4k c3= 6800pf c4=open c6=0.015 f c1= 0.01 f l1=10 h d1=sbm30-03 c2=10 f/25v h:on or open c9=22 f/16v pre-drive current limit logic l:off +- c8=10 f/25v c5=22 f/16v ? c1,c8,c5,c9 = ceramic capacitor ? l1=cdrh105rnp-100nc (sumida) rb=0 sanyo : sop8l(200mil) 0.05 12 8 0.2 4.93 3.94 5.99 0.64 0.41 1.27 1.68 max (1.5) top view side view side view bottom view (3.10) (2.41) -20 0 20 40 60 80 100 0 2.5 2.0 1.5 1.0 0.5 2.05 pd max -- ta ambient temperature, ta -- c allowable power dissipation, pd max -- w 1.15 mounted on a specified board: 46.4 31.8 1.7mm 3 glass epoxy both side
lv58063mc no.a2120-4/5 pin function pin no. pin name description equivalent circuit 1 boot internal high side nmos fet boot strap capacitor terminal. connect around 22nf capacitor or greater between sw and boot. to operate within absolute maximum rating of sw, to keep stable operation, and to reduce switching noise, please, use a series resistor, rb (value is around 100 ) is recommended to use. v in cboot sw hi side mos low side mos 2 v in input voltage pin. large filter capacitor ( equal or larger than 20 f) should be connected between v in and gnd to eliminate noise on the input and to operate properly. see boot 3 sw power switching pin. connect the output lc filter. connect the above-mentioned capacitor between this pin and boot pin. see boot 4 gnd ground pin. 5 fb feedback pin. connect a voltage divider resistor across fb to set the regulated output voltage. the output voltage is given by next equation. v out = vref { 1 + (r1 + r10) r3 } vref = 0.8v example: 3.3v output voltage (see block diagram and sample application circuit) v out = 0.8 { 1 + (27k + 4.3k) 10k } =3.304v internal regulated fb vref 0.8v ss v in 10 a 6 comp phase compensation pin. connect an external capacitor and a resistor for the dc dc converter close loop-phase compensation. comp v in internal regulation line clump circuit 7 en enable terminal. if applying logically high voltage, or left open, the converter operates. if connected to gnd, the converter?s operation stops. en v in 2pf q117 continued on next page.
lv58063mc ps no.a2120-5/5 continued from preceding page. pin no. pin name description equivalent circuit 8 ss soft start terminal internal source current (10 a) and external capacitor will make soft start time. soft start capacitor, c6 is given by next equation, c6 = 10 a tss vref where, tss : soft start time, vref : reference voltage example : soft start time = 1.2ms c6 = 10 a 1.2ms 0.8 v = 0.015 f see fb considerations for the design ? insertion of serial beads in the schottky diode for removal of noise may cause generation of the negative voltage on sw pin deviating from the absolute maximum rating at the sw pi n, resulting in failure of normal operation. please, do not insert beads as above described. inst ead, remove noise by rb resistor. ? exposed pad on the bottom side of the ic should be soldered. we cannot recommend other usages of the exposed pad. on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.
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